66 tips on PCBs Eschips Science
1, how to choose PCB board?
The choice of PCB board must be in the middle of meeting the design needs and mass production
and cost to strike a balance. Design requirements include both electrical and institutional parts. This
material issue is usually important when designing very high speed PCB boards (frequencies greater
than GHz). For example, the FR-4 material commonly used now, the dielectricloss (dielectricloss) at
several GHz frequencies will have a great impact on signal attenuation, may not be suitable. As far
as electrical is concerned, it is necessary to pay attention to whether the dielectricconstant
(dielectricconstant) and the dielectric loss are suitable at the designed frequency.
- How to avoid high-frequency interference? The basic idea of
avoiding high-frequency interference is to minimize the interference of high-frequency signal
electromagnetic field, that is, the so-called Crosstalk. You can increase the distance between the
high-speed signal and the analog signal, or add groundguard/shunttraces next to the analog signal.
Also watch out for noise interference from digital ground to analog ground.
3, in high-speed design, how to solve the problem of signal integrity?
Signal integrity is basically a problem of impedance matching. The factors that affect the impedance
matching are the architecture of the signal source and the outputimpedance (outputimpedance), the
characteristic impedance of the track, the characteristics of the load side, the topology architecture
of the track, etc. The solution is to terminate (termination) and adjust the topology of the cable.
- How is the differential wiring method realized?
Differential wiring has two points to pay attention to, one is that the length of the two lines should be
as long as possible, the other is that the distance between the two lines (the distance is determined
by the differential impedance) should always remain unchanged, that is, to maintain parallel. There
are two ways of parallel, one is that the two lines walk in the same wiring layer (side-by-side), and
one is that the two lines walk in the adjacent two layers (over-under). Generally, the former is side
by-side(side by side) in more ways.
5, for only one output clock signal line, how to achieve differential wiring?
To use differential wiring must be the signal source and the receiving end are also differential signals
to make sense. Therefore, the clock signal with only one output can not be used for differential wiring.
- Can a matching resistance be added between the difference line pairs at the receiving end? The
matching resistance between the
receiving end difference line pairs is usually added, and its value should be equal to the value of the
differential impedance. This will result in better signal quality.
- Why should the wiring of differential pairs be close and parallel? The wiring mode of the
difference pair should be appropriately close and parallel. Proper proximity is because this affects
the value of differentialimpedance, which is an important parameter for differentialimpedance design.
Parallelism is also required to maintain the consistency of the differential impedance. If the two lines
are far and near, the differential impedance will be inconsistent, which will affect signalintegrity and
time delay.
8, how to deal with some theoretical conflicts in the actual wiring?
Basically, it is right to divide and isolate the module/number. It should be noted that the signal path
should not cross the split area (moat), and that the returningcurrentpath of the power supply and the
signal should not be too large.
Crystal oscillator is an analog positive feedback oscillation circuit, to have a stable oscillation signal,
must meet the loopgain and phase specifications, and the analog signal oscillation specifications are easy to be interfered with, even with groundguardtraces may not be completely isolated
interference. And too far away, the ground plane noise will also affect the positive feedback
oscillation circuit. Therefore, make sure that the distance between the crystal and the chip is as close
as possible.
It is true that high-speed cabling has many conflicts with EMI requirements. But the basic principle
is that the resistance capacitor or ferritebead added by EMI can not cause some electrical
characteristics of the signal to fail to meet the specification. Therefore, it is best to use the skills of
arranging wiring and PCB layering to solve or reduce EMI problems, such as high-speed signals to
go the inner layer. Finally, use resistive capacitors or ferritebead methods to reduce the damage to
the signal.
9, how to solve the contradiction between the manual wiring and automatic wiring of high-speed
signals?
Now most of the strong wiring software of the automatic wiring device have set constraints to control
the winding mode and the number of holes. The winding engine capabilities of each EDA company
and the constraint setting items are sometimes very different. For example, whether there are
enough constraints to control how serpentine lines meander or how far apart differential pairs run.
This will affect whether the route of the automatic wiring can conform to the designer's idea.
In addition, the difficulty of manually adjusting the wiring is also absolutely related to the ability of the
winding engine. For example, the ability to push the wire, the ability to push through the hole, and
even the ability to push the wire against the applied copper and so on. Therefore, choose a wiring
device with strong winding engine ability, is the solution.
About testcoupon.
testcoupon is used to measure whether the characteristic impedance of the produced PCB meets
the design requirements by using TDR(TimeDomainReflectometer). Generally, the impedance to be
controlled has two cases: single wire and differential pair. Therefore, the line width and line distance
on testcoupon (when there are differential pairs) must be the same as the lines to be controlled. The
most important thing is to measure the position of the time ground point. In order to reduce the
inductance value of the groundlead, the ground of the TDR probe is usually very close to the probetip.
Therefore, the distance and manner between the measured signal point and the ground point on the
testcoupon must conform to the probe used.
- In high-speed PCB design, the blank area of the signal layer can be coated with copper, and
how should the copper of multiple signal layers be distributed on the ground and connected power
supply? In
general, most of the copper applied in the blank area is grounded. Only when applying copper next
to the high-speed signal line, pay attention to the distance between the copper and the signal line,
because the copper will reduce the characteristic impedance of the line. Also be careful not to affect
the characteristic impedance of its layer, such as in the structure of dualstripline.
12, can the signal line above the power plane use the microstrip line model to calculate the
characteristic impedance? Can the signal between the power supply and the ground plane be
calculated using the strip line model?
Yes, both the power plane and the ground plane must be considered as reference planes when
calculating the characteristic impedance. For example, a four-layer board: top layer - power layer -
ground layer - bottom layer, then the model of the characteristic impedance of the top layer is a
microstrip line model with the power plane as the reference plane. 13, in the high-density printed board through the software automatically generated test points under
normal circumstances can meet the mass production of the test requirements? Whether the
general software automatically generates test points to meet the test needs must see whether the
specification of the test point meets the requirements of the test machine. In addition, if the line is
too dense and the test point specification is stricter, it may not be possible to automatically add test
points to each line, of course, you need to manually complete the test place.
- Will adding test points affect the quality of high-speed signals?
As for whether it will affect the quality of the signal depends on the way to add the test point and
how fast the signal is. Basically, additional test points (not an existing viaorDIPpin as a test point)
may be added to the line or a short line pulled out of the line. The former is equivalent to adding a
small capacitor to the line, while the latter is an extra branch. Both of these conditions will affect the
high-speed signal more or less, depending on the frequency speed of the signal and the rate of
change of the signal edge (edgerate). The size of the effect can be determined by simulation. In
principle, the smaller the test point, the better (of course, to meet the requirements of the test
machine) the shorter the branch, the better.
15, a number of PCB composition system, how should the ground wire between the boards be
connected? When the signal or power supply between the
various PCB boards is connected to each other, for example, the A board has A power supply or
signal to the B board, there will be an equal amount of current flowing back from the ground to the
A board (this is Kirchoffcurrentlaw). The current on this layer will find the lowest impedance of the
place to flow back. Therefore, the number of pins assigned to the formation should not be too small
at the interface where the power or signal is connected to each other to reduce the impedance,
which can reduce the noise in the formation. In addition, it is also possible to analyze the entire
current loop, especially the part where the current is larger, and adjust the connection of the
formation or ground wire to control the path of the current (for example, create a low impedance in
one place, so that most of the current goes from this place), and reduce the impact on other more
sensitive signals.
16, Can you introduce some foreign technical books and data on high-speed PCB design?
Now the application of high-speed digital circuits are communication networks and calculators and
other related fields. In the communication network, the working frequency of PCB board has reached
GHz, and the number of layers as far as I know has reached 40 layers. Calculator related
applications also because of the progress of chips, whether it is a general PC or Server (Server),
the highest working frequency on the board has reached 400MHz(such as Rambus) or more. In
response to the demand for high-speed and high-density wiring, the demand for blind/buriedvias,
mircrovias and build-up process is gradually increasing. These design requirements are available
for mass production by manufacturers.
17, two often referred to the characteristic impedance formula:
microstrip Z={87/[sqrt(Er+1.41)]}ln[5.98H/(0.8W+T)], where W is the line width, T is the copper
thickness of the wire, H is the distance from the wire to the reference plane, Er is the
dielectricconstant (dielectricconstant) of the PCB sheet material. This formula must be applied at
0.1<(W/H)<2.0 and 1<(Er)<15.
stripline (stripline)Z=[60/sqrt(Er)]ln{4H/[0.67π(T+0.8W)]} where H is the distance between the two
reference planes, and the track is in the middle of the two reference planes. This formula must be
applied for W/H<0.35 and T/H<0.25. 18. Can ground wires be added in the middle of differential signal lines?
The middle of the difference signal is generally not a ground line. Because the application principle
of the differential signal is the most important point is the use of the benefits brought by the coupling
between the differential signals, such as fluxcancellation, noiseimmunity ability. If the ground wire is
added in the middle, the coupling effect will be destroyed.
- Does the design of rigid adagio need special design software and specifications? Where can we
undertake this kind of circuit board processing in China?
You can use the general design PCB software to design the flexible circuit board
(FlexiblePrintedCircuit). The same Gerber format for FPC manufacturers to produce. Because the
manufacturing process is different from the general PCB, each manufacturer will have its own limits
on the minimum line width, minimum line distance, and minimum aperture (via) according to their
manufacturing capacity. In addition, the flexible circuit board can be strengthened by laying some
copper skin around the bend. As for the manufacturer, you can go to the Internet "FPC" when the
keyword search should be found.
What is the principle of the proper selection of PCB and shell grounding point?
The principle of selecting the ground point of PCB and shell is to use chassisground to provide a low
impedance path to the return current (returningcurrent) and control the path of this return current.
For example, usually in the vicinity of high frequency devices or clock generators can be fixed with
screws to PCB formation and chassisground connection, in order to minimize the entire current loop
area, also reduce electromagnetic radiation.
21, circuit board DEBUG should start from what several aspects?
As far as digital circuits are concerned, first determine three things in sequence:
1) Confirm that the size of all power supply values meet the design requirements. Some systems
with multiple power supplies may require some specification of the order and speed at which certain
power supplies are connected to each other.
2) Verify that all clock signal frequencies are working properly and that there are no non-monotonic
issues on the edge of the signal.
3) Confirm whether the reset signal meets the specification requirements. If these are normal, the
chip should send out the first cycle signal. Next, debug according to the system operation principle
and busprotocol.
22, in the case of fixed circuit board size, if the design needs to accommodate more functions, it is
often necessary to improve the PCB wire density, but this may lead to the mutual interference of the
line enhancement, while the fine line also makes the impedance can not be reduced, please
introduce experts in high-speed (>100MHz) high density PCB design skills?
In the design of high-speed high density PCB, crosstalkinterference is indeed to pay special attention
to, because it has a great impact on timing and signalintegrity. The following provides a few places
to pay attention to:
Control the continuity and matching of the characteristic impedance of the track: the size of the
track spacing. It is common to see that the spacing is twice the line width. Simulation can be used
to know the effect of line spacing on timing and signal integrity, and find out the minimum tolerable
distance. The results may vary from chip to chip signal.
Choose the appropriate termination method: Avoid the same direction of the two adjacent layers, or
even overlapping the upper and lower layers, because this crosstalk is greater than the case of
adjacent cables on the same layer. Use blind holes (buriedvia) to increase the area of the wires. But the cost of making the PCB board
will increase. In the actual implementation of it is really difficult to achieve complete parallel and
isometric, but still try to do it.
In addition, differential terminations and common mode terminations can be reserved to mitigate the
impact on timing and signal integrity.
The filter at the analog power supply is often LC circuit. But why is LC sometimes worse than RC
filtering?
The comparison of LC filtering effect with RC filtering effect must consider whether the frequency
band and inductance value to be filtered are appropriate. Because the reactance of inductance is
related to the inductance value and frequency. If the noise frequency of the power supply is low, and
the inductance value is not large enough, then the filtering effect may not be as good as RC. However,
the cost of using RC filtering is that the resistance itself will consume energy, and the efficiency is
poor, and pay attention to the power that the selected resistance can withstand.
24?
The selection of inductance value in addition to considering the noise frequency that you want to
filter out, but also consider the reaction ability of instantaneous current. If the output end of LC will
have the opportunity to output a large current instantaneously, the inductance value is too large to
hinder the speed of this large current flowing through the inductor, and increase the ripplenoise
(ripplenoise). The capacitance value is related to the ripplenoise standard value that can be tolerated.
The smaller the ripple noise value, the larger the capacitance value. The ESR/ESL of the capacitor
will also make a difference. In addition, if the LC is placed at the output end of the
switchingregulationpower, pay attention to the pole/zero generated by the LC on the stability of the
negativefeedbackcontrol loop.
How to meet the EMC requirements as much as possible, without causing too much cost pressure?
PCB board will increase the cost due to EMC is usually due to increase the number of strata to
enhance the shielding effect and increase the ferritebead, choke and other reasons to inhibit high
frequency harmonic devices. In addition, it is usually necessary to match the shielding structure on
other institutions in order to make the entire system pass the requirements of EMC. The following
only PCB board design tips to provide a few to reduce the electromagnetic radiation effect generated
by the circuit. If
possible, choose a device with a slow signal slope (slewrate) to reduce the high frequency
component of the signal.
Pay attention to the position of the high frequency device, not too close to the external connector.
Pay attention to the impedance matching of high-speed signals, the wiring layer and its
returncurrentpath (returncurrentpath) to reduce the reflection and radiation of high frequency. Place
sufficient and appropriate de-coupling capacitors
in the power pins of each device to mitigate the noise at the power layer and ground. Pay special
attention to whether the frequency response and temperature characteristics of the capacitor meet
the design requirements. The ground near the
external connector can be properly separated from the formation, and the connector ground is
connected to the chassisground as close as possible. groundguard/shunttraces
can be appropriately applied to some particularly high-speed signals. But pay attention to the
influence of guard/shunttraces on the characteristic impedance of the track. The
power layer shrinks by 20H from inside the formation, where H is the distance between the power layer and the formation.
26, when there are many number/mode function blocks in a PCB board, the conventional practice
is to separate the number/mode, why? The reason for the separation of the number/mode is because
the digital circuit
will produce noise in the power supply and the ground when the high and low potential switch, the
size of the noise is related to the speed and current of the signal. If the ground plane is not divided
and the noise generated by the digital region circuit is large and the analog region circuit is very
close, even if the digital and analog signals do not cross, the analog signal will still be interfered with
the ground noise. That is to say, the digital-analog undivided method can only be used when the
analog circuit area is far away from the digital circuit area that generates large noise.
Another method is to ensure that the number/mode separate layout, and the number/mode signal
lines do not cross each other, the entire PCB board does not divide, the number/mode are connected
to the ground plane. The reason why? The requirement that the digital
signal can not cross is because the returncurrentpath of the digital signal that is slightly faster
(returncurrentpath) will flow back to the source of the digital signal as far as possible along the
ground near the bottom of the line. If the digital signal crosses, the noise generated by the
returncurrent will appear in the analog circuit area.
In the high-speed PCB design schematic design, how to consider the impedance matching problem?
In the design of high-speed PCB circuit, impedance matching is one of the elements of design. And
the way to go line impedance value has absolute relationship, such as walking in the surface layer
(microstrip) or the inner (stripline/doublestripline), and a reference layer (layer power or formation)
of distance, line width, PCB material and so on all can influence line characteristic impedance values.
That is to say, the impedance value can be determined after wiring.
General simulation software can not take into account some impedance discontinuity wiring due to
the limitations of the line model or the mathematical algorithm used. At this time, only some
terminators(terminators), such as series resistors, can be reserved on the schematic diagram to
mitigate the effect of the impedance discontinuity. The real fundamental solution to the problem is to
pay attention to avoid the occurrence of impedance discontinuity when wiring.
Where can provide more accurate IBIS model library? The accuracy of
IBIS model directly affects the result of simulation. Basically, IBIS can be regarded as the electrical
characteristics data of the actual chip I/Obuffer equivalent circuit, which can generally be converted
by SPICE model (can also be measured, but more limited), and SPICE data has an absolute
relationship with chip manufacturing, so the same device is provided by different chip manufacturers,
its SPICE data is different. Then the data in the converted IBIS model will also be different.
In other words, if Manufacturer A's device is used, only they can provide accurate model data of their
device, because no one else will know better than them what process their device is made from. If
the IBIS provided by the manufacturer is not accurate, the only way to continuously ask the
manufacturer to improve is to solve the problem.
In the high-speed PCB design, the designer should from what aspects to consider EMC, EMI rules?
radiated and conducted aspects need to be considered in
general EMI/EMC design. The former belongs to the higher frequency segment (>30MHz) and the
latter to the lower frequency segment (<30MHz). So you can't just pay attention to the high
frequencies and ignore the low frequencies. A good EMI/EMC design must be at the beginning of
the layout must take into account the location of the device, PCB laminated arrangement, important online moves, device selection, etc., if these do not have a better arrangement in advance, after the
solution will be less effort, increase costs.
For example, the position of the clock generator should not be close to the external connector as far
as possible, the high-speed signal should go the inner layer as far as possible and pay attention to
the continuity of the characteristic impedance matching with the reference layer to reduce reflection,
and the slope of the signal pushed by the device (slewrate) should be as small as possible to reduce
the high-frequency component. When selecting decoupling/bypass capacitor, pay attention to
whether the frequency response meets the demand to reduce the noise of the power supply layer.
In addition, pay attention to the return path of the high frequency signal current to make the loop
area as small as possible (that is, the loopimpedance is as small as possible) to reduce radiation. It
is also possible to control the range of high-frequency noise by dividing the stratum. Finally, the
appropriate selection of PCB and shell ground (chassisground).
31, how to choose EDA tools? The
current PCB design software, thermal analysis is not strong, so it is not recommended to choose,
other functions 1.3.4 can choose PADS or Cadence performance price is good. PLD design
beginners can use the integrated environment provided by PLD chip manufacturers, in the design
of more than one million doors can choose a single point tool.
Please recommend a kind of EDA software suitable for high-speed signal processing and
transmission.
Conventional circuit design, INNOVEDA PADS are very good, and with simulation software, and this
kind of design often occupies 70% of the application. In high-speed circuit design, analog and digital
mixed circuit, Cadence solution should belong to the performance and price of relatively good
software, of course, Mentor's performance is still very good, especially its design process
management should be the best. (Wang Sheng, technical expert of Datang Telecom)
33, The explanation of the meaning of each layer of PCB board?
Topoverlay: Top layer device name, also called topsilkscreen or topcomponentlegend, such as R1C5,
IC10.bottomoverlay.
Same with multilayer: If you design a 4-layer board, you place a freepadorvia, define it as multilay,
then its pad will automatically appear on the 4 layers, if you only define it as a toplayer, then its pad
will appear on the toplayer only.
34, 2G above high frequency PCB design, wiring, typesetting, should pay attention to what aspects?
More than 2G high frequency PCB belongs to RF circuit design, not within the scope of high-speed
digital circuit design discussion. The layout and routing of the RF circuit should be considered
together with the schematic diagram, because the layout and routing will cause distribution effects.
Moreover, some passive devices in RF circuit design are realized by parametric definition and
special shape copper foil, so EDA tools are required to provide parametric devices and edit special
shape copper foil.
Mentor's boardstation has a dedicated RF design module that can meet these requirements. In
addition, general RF design requires specialized RF circuit analysis tools, the industry's most famous
is agilent's eesoft, and Mentor's tools have a good interface. Above
2G high frequency PCB design, microstrip design should follow what rules?
Rf microstrip line design, need to use three-dimensional field analysis tools to extract transmission
line parameters. All the rules should be specified in this field extraction tool.
36, for an all-digital signal PCB, there is an 80MHz clock source on the board. In addition to the use of wire mesh (grounding), in order to ensure that there is enough driving capacity, what kind of circuit
should be used for protection?
To ensure the driving ability of the clock, it should not be achieved through protection, and the clock
driver chip is generally used. The general concern about clock drive capability is due to multiple
clock loads. The clock driver chip is used to turn one clock signal into several, and point-to-point
connection is adopted. Select the driver chip, in addition to ensure that the basic match with the load,
the signal along to meet the requirements (the general clock is an effective signal along the clock),
in the calculation of system timing, to calculate the clock in the driver chip delay.
If a separate clock signal board is used, what kind of interface is generally used to ensure that the
transmission of the clock signal is less affected? The shorter the
clock signal, the smaller the transmission line effect. Using a separate clock signal board will
increase the signal wiring length. And the grounding power supply of the board is also a problem. A
differential signal is recommended if you want to transmit over long distances. LVDS signals can
meet drive capability requirements, though your clock is not too fast to be necessary.
38, 27M, SDRAM clock lines (80M-90M), the second and third harmonics of these clock lines are
just in the VHF band, and the interference is very high after the high frequency from the receiving
end. In addition to shortening the length of the line, what are the good ways?
If the third harmonic is high and the second harmonic is low, it may be because the duty cycle of the
signal is 50%, because in this case, the signal has no even harmonic. At this time, the signal duty
cycle needs to be modified. In addition, if the clock signal is one-way, the source end is generally
used in series matching. This can inhibit secondary reflection, but does not affec t the clock edge
rate. The matching value of the source side can be obtained by using the following formula.
- What is the topology architecture of the cable?
Topology, also known as routingorder, is the routingorder for multi-port connected networks.
- How to adjust the routing topology to improve signal integrity?
This kind of network signal direction is more complex, because the one-way signal, two-way signal,
different level types of signal, the topological impact is not the same, it is difficult to say which
topological is beneficial to signal quality. And for pre-simulation, what kind of topology to use is very
demanding for engineers, requiring the circuit principle, signal type, and even wiring difficulty to
understand.
41, how to reduce EMI problems by arranging layers?
First of all, EMI should be considered from the system, PCB alone can not solve the problem. For
EMI, I think it is mainly to provide the shortest return path of the signal, reduce the coupling area,
and inhibit differential mode interference. In addition, the ground is tightly coupled with the power
layer, which is better than the epitaxy of the power layer, which is good for suppressing common
mode interference.
42, why do you want to lay copper? There are several reasons for
generally laying copper.
1) EMC. For a large area of ground or power supply copper, will play a shielding role, some special,
such as PGND plays a protective role.
2) PCB process requirements. In general, in order to ensure the electroplating effect, or the
lamination is not deformed, copper is laid on the PCB board layer with less wiring.
3) Signal integrity requirements, give high frequency digital signals a complete return path, and
reduce the wiring of the DC network. Of course, there are heat dissipation, special device installation requirements of copper and so on. In a system
, including dsp and pld, what problems should be paid attention to when wiring?
Look at the ratio of your signal rate and wiring length. If the delay of the signal in the transmission
line is comparable to the signal change over time, consider the signal integrity issue. In addition, for
multiple DSPS, clock and data signal routing topology will also affect signal quality and timing, which
needs attention.
44, in addition to protel tool wiring, there are other good tools?
As for tools, in addition to PROTEL, there are many wiring tools, such as MENTOR's WG2000,
EN2000 series and powerpcb, Cadence's allegro, zuken's cadstar, cr5000, etc., each has its own
strengths.
- What is "signal return path"?
Signal return path, that is, returncurrent. When high-speed digital signals are transmitted, the flow
of the signal is from the driver along the PCB transmission line to the load, and then from the load
along the ground or the power supply through the shortest path back to the driver end. This return
signal on the ground or power supply is called the signal return path. In his book, Dr.Johson explains
that high-frequency signal transmission is actually the process of charging the dielectric capacitor
sandwiched between the transmission line and the DC layer. It is the electromagnetic properties of
this enclosure that SI analyzes, and the coupling between them.
- How to perform SI analysis for docking plug-ins?
In the IBIS3.2 specification, there is a description of the plug-in model. Generally, the EBD model is
used. If it is a special board, such as a backboard, a SPICE model is required. It is also possible to
use multi-board simulation software (HYPERLYNX or IS_multiboard), when building a multi-board
system, enter the distribution parameters of the connector, which are generally obtained from the
connector manual. Of course, this method will not be accurate enough, but as long as it is within the
acceptable range.
- What are the ways of terminating?
Terminating (terminalMatch. The source end matching is generally resistance series matching, the
terminal matching is generally parallel matching, there are more ways, resistance pull-up, resistance
pull-down, Davinan matching, AC matching, Schottky diode matching.
48, the use of terminating (matching) is determined by what factors? The
matching method is generally determined by the BUFFER characteristics, topp situation, level type
and decision mode, and also consider the signal duty cycle, system power consumption and so on.
49, what are the rules of terminating (matching)? The most critical
digital circuit is the timing problem, and the purpose of matching is to improve the signal quality, and
the signal can be determined at the decision time. For the effective signal, the signal quality is stable
under the premise of ensuring the establishment and holding time; For the effective signal, under
the premise of ensuring the monotonicity of the signal delay, the signal change and delay speed
meet the requirements. There is some information about matching in the MentorICX product
textbook. Chapter one HighSpeedDigitaldesignahandbookofblackmagic specifically to the terminal,
from the principle of electromagnetic waves on the matching effect on signal integrity, available for
reference.
Can the IBIS model of the device be used to simulate the logic function of the device? If not, how to
simulate the circuit at board level and system level?
IBIS models are behavioral level models and cannot be used for functional simulation. For functional simulation, you need to use SPICE models, or other structural level models.
In the digital and analog coexistence of the system, there are two processing methods, one is digital
and analog separate, such as in the formation, digital is an independent piece, analog independent
piece, a single point with copper or FB magnetic beads connected, and the power is not separated;
The other is that analog power and digital power are connected separately with FB, and the ground
is unified. Is the effect of these two methods the same? I
should say they are the same in principle. Because the power supply and the ground to the high
frequency signal are equivalent. The purpose of
distinguishing the analog and digital parts is to resist interference, mainly the interference of the
digital circuit to the analog circuit. However, segmentation may cause incomplete signal return path,
affect the signal quality of the digital signal, affect the EMC quality of the system. Therefore, no
matter which plane is divided, it is necessary to see whether the signal return path is increased in
this way, and how much the return signal interferes with the normal working signal. Now there are
also some hybrid design, regardless of power and ground, in the layout, according to the digital part,
analog part of the separate layout and wiring, to avoid cross-zone signals.
Safety issue: What is the specific meaning of FCC and EMC? The
FCC: federalcommunicationcommission the communication board
EMC: electromegneticcompatibility EMC
FCC is a standard organization, EMC is a standard. Standards are issued for a reason, standards
and testing methods.
53, what is differential wiring?
Differential signals, some also known as differential signals, with two exactly the same, opposite
polarity of the signal transmission a way of data, relying on two signal level difference for judgment.
In order to ensure that the two signals are completely consistent, they should be kept parallel when
wiring, and the line width and line spacing should remain unchanged.
54, PCB simulation software what? There are many kinds of
simulation, high-speed digital circuit signal integrity analysis simulation analysis (SI) commonly used
software icx, signalvision, hyperlynx, XTK, speectraquest and so on. Some also use Hspice.
55, PCB simulation software is how to carry out LAYOUT simulation? In
high-speed digital circuits, in order to improve signal quality and reduce the difficulty of wiring, multi
layer boards are generally used to allocate special power layers and strata.
56, in the layout, wiring how to deal with to ensure the stability of more than 50M signal?
High-speed digital signal wiring, the key is to reduce the impact of transmission line on signal quality.
Therefore, the high-speed signal layout of more than 100M requires the signal line to be as short as
possible. In the digital circuit, the high-speed signal is defined by the signal rise delay. Moreover,
different kinds of signals (such as TTL, GTL, LVTTL), the method of ensuring signal quality is
different.
57, the RF part of the outdoor unit, the intermediate frequency part, and even the low-frequency
circuit part of the outdoor unit for monitoring are often deployed on the same PCB. What are the
requirements for such a PCB in the material? How to prevent the interference between radio
frequency, intermediate frequency and even low frequency circuit?
Hybrid circuit design is a big problem. It's hard to have a perfect solution.
Generally, the RF circuit is laid out as a separate board in the system, and even has a special
shielding cavity. And the RF circuit is generally one side or two panels, the circuit is relatively simple, all these are to reduce the impact on the distribution parameters of the RF circuit, improve the
consistency of the RF system. Compared with the general FR4 material, the RF circuit board tends
to use a high Q value substrate, which has a relatively small dielectric constant, small transmission
line distribution capacitance, high impedance, and small signal transmission delay. In the hybrid
circuit design, although the radio frequency and digital circuit are done on the same PCB, they are
generally divided into the radio frequency circuit area and the digital circuit area, respectively.
Between the ground hole belt and shielding box shielding.
58, For the RF part, the IF part and the low frequency circuit part are deployed on the same PCB,
what is mentor's solution?
Mentor's board level system design software, in addition to the basic circuit design functions, there
is a special RF design module. In the RF schematic design module, it provides parametric device
models and bidirectional interfaces with EESOFT and other RF circuit analysis and simulation tools.
In the RFLAYOUT module, it provides the pattern editing function specially used for RF circuit layout
and wiring, and also has the two-way interface with EESOFT and other RF circuit analysis and
simulation tools, for the analysis and simulation results can be marked back to the schematic
diagram and PCB. Meanwhile, the design management function of Mentor software can facilitate
the realization of design reuse, design derivation and collaborative design. It can greatly accelerate
the process of hybrid circuit design. Mobile phone board is a typical hybrid circuit design. Many large
mobile phone design manufacturers use Mentor and Angel's eesoft as a design platform.
59, On a 12-layer PCb board, there are three power layers 2.2v, 3.3v, 5v, each of the three power
supplies in a layer, how to deal with the ground?
Generally speaking, the three power supplies are done in three layers, which is better for signal
quality. Because it is unlikely that the signal cross-plane layer segmentation phenomenon. Cross
segmentation is a key factor affecting signal quality, which is generally ignored by simulation
software. Both the power layer and the ground layer are equivalent for high frequency signals. In
practice, in addition to considering the signal quality, power plane coupling (using adjacent ground
planes to reduce the AC impedance of the power plane), layer symmetry, are all factors that need to
be considered. How to check whether the
PCB meets the design process requirements when leaving the factory?
Many PCB manufacturers in the PCB processing is completed before the factory, have to go through
the power of the network connection test to ensure that all the connections are correct. At the same
time, more and more manufacturers also use X-ray testing to check some faults when etching or
laminating. For the finished board after the patch processing, ICT test inspection is generally adopted,
which requires adding ICT test points in the PCB design. If there is a problem, it can also be ruled
out whether the fault is caused by processing through a special X-ray inspection equipment.
61, when choosing the chip, is it also necessary to consider the esd problem of the chip itself?
Whether it is double-layer board or multi-layer board, the area should be increased as much as
possible. When choosing the chip, consider the ESD characteristics of the chip itself, which are
generally mentioned in the chip description, and even if the performance of the same chip from
different manufacturers will be different. Pay more attention to the design, consider a comprehensive
point, the performance of the circuit board will be guaranteed. However, the problem of ESD may
still occur, so the protection of the mechanism is also very important for ESD protection. When doing
PCB board
, in order to reduce interference, should the ground wire form a closed and closed form? When doing PCB board, generally speaking, it is necessary to reduce the loop area,
in order to reduce interference, when the ground wire is distributed, it should not be distributed into
a closed form, but into a dendritic shape, and it is better to increase the area as much as possible.
If the simulator uses a power supply, the PCB board uses a power supply, whether the two power
supplies should be connected together?
If you can use a separate power supply is of course better, because it is not easy to interfere with
the power supply, but most of the equipment has specific requirements. Since the simulator and
PCB board use two power supplies, according to my idea is not should be common ground.
A circuit is composed of several PCB boards, should they be common ground?
A circuit is composed of several PCBS, most of which require common ground, because it is not
practical to use several power supplies in a circuit after all. But if you have specific conditions, you
can use different power supplies, of course, the interference will be less.
65, design a handheld product, with LCD, shell for metal. When testing ESD, cannot pass the test
of ICE-1000-4-2, CONTACT can only pass 1100V, AIR can pass 6000V. When ESD coupling test,
horizontal can only pass 3000V, vertical can pass 4000V test. The main frequency of the CPU is
33MHZ. Is there any way to pass the ESD test?
Handheld products are metal shell, ESD problems must be more obvious, LCD is afraid there will
be more adverse phenomena. If there is no way to change the existing metal material, it is
recommended to add anti-electric materials inside the mechanism, strengthen the PCB ground, and
find a way to ground the LCD. Of course, how to operate depends on the specific situation.
Design a system containing DSP, PLD, from which aspects to consider ESD?
In terms of the general system, the main part should be considered the direct contact of the human
body, and the appropriate protection on the circuit and the mechanism. As for ESD will cause much
impact on the system, it also depends on different circumstances. Dry environment, ESD
phenomenon will be more serious, more sensitive and fine system, ESD impact will be relatively
obvious. Although large systems sometimes ESD impact is not obvious, but the design should pay
more attention to prevent as much as possible.
