Chip manufacturing process is briefly introduced Eschips

The chip construction process sweeps through several sections such as chip planning, chip construction, package construction, and testing, and the chip construction process is particularly rich. The first is the chip plan, according to the needs of the plan, the natural "pattern"
The chip construction process sweeps through chip planning, chip construction, package construction, testing and other sections, and the chip construction process is particularly rich. The first is the chip plan, according to the needs of the plan, the natural "pattern"
The factor of the wafer is silicon, silicon is condensed from quartz sand, the wafer is the silicon element to be purified (99.999%), and then these pure silicon into silicon rods, to become the raw material for the establishment of integrated circuit of the quartz semiconductor, the chip is the wafer necessary for the construction of the whole chip. The thinner the wafer, the lower the cost of production, but the higher the requirements for the process.
A layer of photoresist is applied to the wafer (or substrate) and dried. The dried wafers are transferred to the lithography machine. The light passes through a mask to project the image on the mask onto the photoresist on the wafer surface, completing the exposure and stimulating the photochemical reaction. The wafer after exposure is baked a second time, that is, the so-called post-exposure baking, and the photochemical reaction is more diffuse after baking.
Finally, the developer is sprayed onto the photoresist on the wafer surface to develop the exposure pattern. After development, the pattern on the mask is retained on the photoresist. Gluing, baking, and developing are all performed in the homogenizing developer, and exposure is performed in the lithography machine. Uniform developers and lithographers are usually operated online, and wafers are transferred between units and machines by hand.
The CMOS chip process can be divided into front-end manufacturing (including wafer processing and wafer testing) and post-manufacturing (including packaging and testing).
Wafer processing: is the production of electronic devices (such as CMOS, capacitors, logic gates, etc.) and circuits on silicon wafers, the process is extremely complex and the investment is huge, taking microprocessor as an example, its manufacturing process can reach hundreds of processes, the required processing equipment is advanced and expensive, tens of millions of dollars a piece. The requirements for the Clean room of the manufacturing environment are very strict, and the temperature, humidity and dust content need to be strictly controlled. Although the manufacturing process of various products is slightly different, the basic process is generally in the wafer cleaning, oxidation and deposition, and then repeated lithography, etching, film deposition and ion injection and other processes, and finally form the circuit on the wafer.
Wafer test: is an electrical test performed on a wafer after it is completed. In general, there is only one product on a wafer. Each grain will be tested one by one, and those that fail will be marked. The wafer will then be cut into individual grains in grain size.
Chip packaging: The use of plastic or ceramic packaging grain and wiring to form products; The purpose is to add a protective layer to the manufactured circuit to avoid mechanical scratching or high temperature damage to the circuit.
Final test: It is to test the packaged chip to ensure that its genuine rate is the yield.
Chip design debug
This design phase is an important step for any chip production company, because if the chip design does not work as designed after production, it means more than just a redesign. The whole verification work is divided into several processes. The basic function test verifies that all the gate circuits in the chip can work normally, and the workload simulation tests SY to confirm the performance that the gate circuit combination can achieve. Of course, at this time, there is no real physical sense of the real chip exists, and all these tests are still simulated by HDL programming.
Chip manufacturing is layered up, up to hundreds of superpositions. Each superposition must overlap perfectly with the previous one, and the overlap error is required to be 1 to 2 nanometers. The placement of the wafer from the transfer module on the wafer platform will produce a certain mechanical error, and the error of precision machinery is in the micron scale (1 micron =1,000 nanometers). Before each exposure, precise measurements must be made for each wafer, capturing tiny errors at the nanoscale in each block of the wafer. Real-time correction at the exposure stage to nanometer level accuracy.
Later packaging is to use a wire to connect the circuit pin on the silicon wafer to the external connector, so that the silicon wafer can connect to other devices, and then add a shell for the silicon wafer, which will install, fix, enhance the electric heating performance, seal, protect the chip and other aspects of the role.
The wires are connected to the pins of the package housing through the contacts on the chip, and the wires can be connected to other devices through these pins, so that the internal chip and the external circuit are successfully connected. After the chip packaging is completed, it also needs to accept quality inspection, and qualified products are delivered to users.